From IC design services to the industry’s first continuum power integrity simulator — over two decades of building tools for power delivery engineering.
Incorporated in the state of Arizona on January 31, 2003. ComLSI began as a fabless custom chip company providing analog, mixed-signal, and digital IC design services. The founding team brought combined VLSI design experience of over 75 years, spanning chip, board, and system-level electronics. Initial focus areas included power management architectures, high-speed signaling, and integrated voltage regulation.
Filed initial patent applications in power management architectures. Developed a consulting partnership with Tanner Research. Created the Virtual Design Center (VDC) model for cost-effective IC design outsourcing. Built Silicon IP in 180nm Logic CMOS for TMDS and LVDS-compatible transceivers, wideband PLLs, and high-PSRR linear voltage regulators. Co-chaired the Arizona Nanotechnology Cluster (2004–2006). Presented Active Noise Regulation at the First AZ Nanotechnology Symposium (March 2006).
Deepened power integrity research through engagements with Intel Corporation and Texas Instruments. Published foundational work on Active Noise Regulation (ANR) — a patented System-in-Package technology for dynamic voltage droop mitigation using active charge regulation near the load. Developed RPTS (Rapid Power Transistor Switching) technology for energy-efficient DC-to-DC conversion. Published “Dynamic Voltage Droops and Total Power Integrity” in EETimes (May 2008), introducing the concept of rogue wave-like noise interference in power grids.
Developed PI-FP (Power Integrity First Principles), the industry’s first true physical power integrity simulation software. PI-FP used a proprietary continuum simulator to analyze dynamic voltage drop across the entire system stack — from VRM through board, package, and into the chip. Unlike existing IR-drop tools that relied on resistive-only models, PI-FP captured inductance, wave propagation, and distributed grid dynamics. Published “IC Floorplanning and Power Integrity” at SOCcentral (2010). Co-authored Power Integrity Analysis and Management for Integrated Circuits (Prentice-Hall PTR Signal Integrity Series, 2010).
Co-authored and edited Power Integrity for Nanoscale Integrated Systems (McGraw Hill, 2014), addressing PI analysis for advanced process nodes. Released RLCSIM, a demonstration grid simulation environment based on the PI-FP solver, enabling users to run physical grid simulations from the examples in both books.
Published a series of technical articles demonstrating PI-FP’s capabilities: continuum simulation of load current modulation through clock skew design (appeared in Planet Analog, April 2016); simulation of local resonances excited by load currents in chip power grids (May 2016); and analysis of dynamic voltage drop variation with load vector delays (June 2016) — which included a pointed critique of the EDA industry’s “vectorless analysis” paradigm.
Published an essay tracing the origins of Moore’s Law to the Jevons Paradox of 1865, examining the non-physical nature of the integration trend and its consequences for power, energy, and power integrity in semiconductor systems.
PDNLab carries forward the PI-FP simulation engine into a modern desktop application built for the AI silicon era. Full-stack power delivery network modeling — board, package, and on-chip — with true physical transient simulation, 3D visualization, and AI-assisted analysis. Purpose-built for the power integrity challenges of AI accelerators pushing beyond 1 W/mm².