Books, papers & patents
Foundational work from over two decades of Anasim power integrity research — books, peer literature, PI-FP simulation studies, and a 40+ patent portfolio.
Books
Power Integrity Analysis and Management for Integrated Circuits
Raj Nair and Donald Bennett
Prentice-Hall PTR Signal Integrity Series, 2010. The first comprehensive treatment of power integrity from chip to system, covering droop theory, continuum simulation, and active noise regulation.
Amazon →
Power Integrity for Nanoscale Integrated Systems
Masanori Hashimoto and Raj Nair
McGraw Hill, 2014. Advances the field into nanoscale processes covering on-chip resonances, advanced PDN modeling, and power integrity for 3D ICs and TSV assemblies.
Amazon →Selected Papers & Articles
Emerging Directions for Packaging Technologies
R. Mahajan, Raj Nair et al. — Intel Technology Journal, 2002
Microprocessor Assembly Interconnect Pathfinding Challenges
Raj Nair — Intel Assembly & Test Technology Journal, 2001
Beyond IR Drop: Dynamic Voltage Droops and Total Power Integrity
Raj Nair and Donald Bennett, Anasim Corp. — EETimes, March 2008
IC Floorplanning and Power Integrity
Raj Nair, Anasim Corp. — EDN / SOCcentral, 2008–2010
A Power Integrity Wall Follows the Power Wall
Raj Nair, Anasim Corp. — 2008
PI-FP Simulation Studies
PI Continuum Simulation: Load Modulation
Clock skew splits a load spike into two peaks; true-physical simulation reveals counterintuitive 66% noise increase.
Local Resonances in a Chip Power Grid
Continuum simulation demonstrating frequency-dependent noise amplification of ~20% due to local resonances.
DVD Variation with Load Vector Delays
Load vector phase differences impact DVD by up to 8%. A critique of vectorless analysis limitations.
Patents
40+ US and international patents across power delivery, packaging, IC design, and active noise regulation.
